{"id":249321,"date":"2025-06-17T14:50:15","date_gmt":"2025-06-17T12:50:15","guid":{"rendered":"https:\/\/www.hwcooling.net\/?p=249321\/"},"modified":"2025-06-19T15:36:05","modified_gmt":"2025-06-19T13:36:05","slug":"pci-express-7-0-finalized-up-to-256-gb-s-for-graphics-cards","status":"publish","type":"post","link":"https:\/\/www.hwcooling.net\/en\/pci-express-7-0-finalized-up-to-256-gb-s-for-graphics-cards\/","title":{"rendered":"PCI Express 7.0 finalized: Up to 256 GB\/s for graphics cards"},"content":{"rendered":"

This year\u2019s Nvidia GeForce RTX 5000<\/a> and AMD Radeon RX 9000<\/a> graphics cards are the first gaming GPUs to use PCI Express 5.0 interface. However, the technology has already moved on far ahead. The PCI-SIG consortium has just completed and published the final specification for the new PCI Express 7.0 standard, which is four times faster. It also introduces a technology that replaces electrical signals with optics.<\/p>\n

We reported on the upcoming release of PCIe 7.0 in January<\/a>, and now PCI-SIG has officially completed and published the final\u00a0specification \u2013\u00a0version 1.0 \u2013 of this interconnect standard that underpins personal computers, laptops, and servers. PCI Express 7.0 is now officially finalized. That doesn\u2019t mean development of devices and controllers using this technology can only start now \u2013 most manufacturers have been working with draft versions of the standard for some time.<\/p>\n

Four times the speed of today, with backward compatibility retained<\/h3>\n

PCI Express 7.0 continues the trend of each generation doubling performance. PCI Express 5.0, currently used in PCs, provides 4 GB\/s of bandwidth per lane in one direction, while PCI Express 6.0, released in 2021<\/a> (but not yet adopted in consumer PCs), delivers 8 GB\/s per lane. PCI Express 7.0, just completed, now pushes a single lane to 16 GB\/s.<\/p>\n

This is achieved using the same PAM4 (Pulse Amplitude Modulation) as PCIe 6.0, but with the signalling frequency doubled. According to PCI-SIG, the new standard offers not only higher speeds but also improved energy efficiency \u2013 delivering the same performance at lower power.<\/p>\n

\"PCI<\/a>
PCI Express 7.0 (Author: PCI-SIG)<\/figcaption><\/figure>\n

Backward compatibility is still maintained, meaning older cards will work in newer slots and vice versa. Final speeds will, of course, be limited by the slower of the two sides. The fact that compatibility is still intact in the seventh generation is something of a small miracle, especially since PCI Express has been used in PCs as the main bus interface for over twenty years, which is longer than any previous interconnect technology.<\/p>\n

M.2 slots with four lanes, commonly used for NVMe SSDs, will be capable of read\/write speeds nearing 64 GB\/s with PCIe 7.0 \u2013 though real-world read or write speeds will be slightly lower due to overhead. Full \u00d716 slots for GPUs (with 16 lanes) will offer bandwidth close to 256 GB\/s. PCI-SIG documentation quotes total added-up bandwidth in both directions (since PCIe is fully duplex and allocates full bandwidth for both directions simultaneously), so total bandwidth for a PCIe 7.0 \u00d716 slot is stated as 512 GB\/s.<\/p>\n

\"Rychlosti<\/a>
PCI Express speeds (combined bandwidth both directions) (Author: PCI-SIG)<\/figcaption><\/figure>\n

This level of bandwidth could benefit GPUs, for example, in scenarios where a game needs more memory than is available on the card \u2013 with 256 GB\/s bandwidth, streaming textures from system memory would have far less of a performance hit.<\/p>\n

Judging by how long it has taken PCI Express 6.0 to make it into actual products, it\u2019s clear it will still be a few more years before processors, motherboards, and devices using PCI Express 7.0 reach the market. This kind of lag is quite typical, similar delays occurred with PCIe 4.0 and 5.0.<\/p>\n

\"Evoluce<\/a>
Evolution of PCI and PCI Express interfaces (total bandwidth both directions) (Author: PCI-SIG)<\/figcaption><\/figure>\n

Future developments: PCI Express 8.0 and optical technology<\/h3>\n

PCI-SIG also announced that the consortium is already working on the next-generation PCI Express 8.0, which should again double the speed (to 32 GB\/s per lane per direction). This version of the specification might still retain backward compatibility, though that has not yet been confirmed.<\/p>\n

Separately, PCI-SIG is developing an optical connectivity for PCI Express. Specifically, a technology called the Optical Interconnect Solution<\/strong>, which was also announced by the consortium. For now, this does not seem to mean a full replacement of electrical signalling with optical across the whole interface. Instead, the technology involves using optical retimers that convert electrical signals to optical for part of the transmission path, and then back again \u2013 such as on the link between a CPU and GPU or SSD.<\/p>\n

The goal is not a full shift to optical communication but to offer an alternative signalling method. This would be particularly useful when signals must travel longer distances or through environments prone to heavy interference.<\/p>\n

This technology will likely be used mainly in servers. While the idea of optical fibre using risers in a PC is interesting, it would require using additional active components that likely wouldn\u2019t come cheap. The Optical Interconnect Solution is included in the PCI Express 7.0 standard but will also be compatible with the previous PCI Express 6.0 generation. The consortium has now added it to version 6.4 of the PCIe specification.<\/p>\n

Sources: PCI-SIG (1<\/a>, 2<\/a>)<\/em><\/p>\n

English translation and edit by Jozef Dud\u00e1\u0161<\/em><\/p>\n