![\"Roadmapy](\"https:\/\/www.hwcooling.net\/wp-content\/uploads\/2025\/11\/Roadmapy-AMD-z-Financial-Analyst-Day-2025-07.png\")
<\/a>It is less certain whether desktop Zen 6 processors for the AM6 socket (codenamed Olympic Ridge) will also include LP cores. They could certainly reduce idle power consumption, but we expect AMD to omit them from desktop processors to save die area\u2014and therefore reduce the cost\u2014of the I\/O chiplet. There are also rumors that these processors may even lack integrated graphics, although those reports have not been fully confirmed. It is possible they simply mean that most desktop CPUs will have the iGPU disabled, even though the silicon physically contains it, with some models still shipping with graphics enabled. But the chances of LP cores appearing in desktop Olympic Ridge processors are probably lower than the chances that they will retain the integrated graphics.<\/p>\n
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- Read more: Zen 6 Desktop Ryzen CPUs Reportedly Lack Integrated GPU<\/a><\/strong><\/li>\n<\/ul>\n
A hybrid of Zen 6 and Zen 5?<\/h3>\n
Intel uses the same “Atom” core architecture (currently, for example, Skymont and Darkmont) for LP E-Cores as it does for its standard E-Cores. The difference is that LP E-Cores operate at lower clock speeds and are not connected to the ring bus and L3 cache, further reducing their performance. According to reports circulating online, AMD may take a different approach. The LP cores in Ryzen processors are apparently being developed as a separate architectural branch and will differ from both the standard Zen 6 cores and the compact Zen 6c cores.<\/p>\n
![\"Procesor](\"https:\/\/www.hwcooling.net\/wp-content\/uploads\/2026\/04\/Procesor-AMD-Epyc-Venice-s-jadry-Zen-6-1024x576.jpg\")
<\/a>AMD Epyc Venice processor with Zen 6 cores (illustration). It is expected to contain the dense “middle” Zen 6c efficiency cores (Source: AMD)<\/figcaption><\/figure>\n However, this architecture may not be a completely independent evolutionary branch unrelated to the mainstream cores. According to rumors (whose origin is not very clear, though), AMD will likely base this low-power core on an architecture evolved from Zen 5, albeit possibly with various simplifications. What we are currently referring to as Zen 6 LP (whether that will be the official name remains unknown) could therefore also be described as Zen 5 LP. Earlier leaks did, in fact, claim that Zen 6 processors would be paired with Zen 5 LP cores, which may actually be explained by Zen 6 LP actually being close to Zen 5. Perhaps older AMD documents tended to designate the core based on that.<\/p>\n
To allow this core to operate seamlessly alongside Zen 6 cores, however, AMD will incorporate all changes affecting the instruction set and software compatibility. From the software’s perspective, Zen 6 LP will therefore present itself as a Zen 6 generation core, even though internally it will function more like Zen 5 and will likely offer substantially lower performance than Zen 6.<\/p>\n
Ryzen processors\u2014at least those intended for laptops\u2014will therefore lose some of their previous homogeneity. Although the instruction set will remain compatible across all threads, CPUs will now contain three different core types: full-fledged Zen 6 cores with high single-threaded performance; compact Zen 6c cores offering the same architecture and IPC (performance per MHz), but with a significantly lower maximum clock speed; and finally Zen 6 LP cores. These will not only operate at lower clock speeds, but will also deliver lower performance per 1 MHz. In addition, some instructions (for example, AVX-512 shuffle operations sound like possible candidates) may suffer substantially reduced performance beyond that\u2014their implementation may be only rudimentary, intended to ensure correct compatibility rather than respectable execution speed. It is also possible, for example, that the LP cores will not support SMT. However, since LP cores are not intended to boost high-performance multi-threaded workloads, this should not be a significant drawback.<\/p>\n
Source: Phoronix<\/a><\/em><\/p>\n
English translation and edit by Jozef Dud\u00e1\u0161<\/em><\/p>\n