{"id":76097,"date":"2021-11-04T14:00:15","date_gmt":"2021-11-04T13:00:15","guid":{"rendered":"https:\/\/www.hwcooling.net\/?p=76097\/"},"modified":"2022-01-29T04:16:27","modified_gmt":"2022-01-29T03:16:27","slug":"intel-core-i9-12900k-megatest-amd-in-2nd-place-again","status":"publish","type":"post","link":"https:\/\/www.hwcooling.net\/en\/intel-core-i9-12900k-megatest-amd-in-2nd-place-again\/","title":{"rendered":"Intel Core i9-12900K megatest: AMD in 2nd place again"},"content":{"rendered":"\n

The 12th generation Intel Core processors \u2013 Alder Lake is now out and we already have the full-fledged tests for you. These processors are significantly different from the previous ones in many aspects and many things are used “for the first time”. Among them are DDR5 memory support, PCI Express 5.0, 7 nm manufacturing process or hybrid concept of small and large cores. It’s time for a detailed analysis!<\/p>\n

Intel Core i9-12900K in detail<\/h2>\n

We’ve kept you up to date on all the Intel Alder Lake processor news as it’s come out throughout the year. But if you happened to miss something, it doesn’t matter. That’s what this first chapter is for, to give everyone a quick overview of what we’ll be covering next.<\/p>\n

Alder Lake-S is the first desktop processor to abandon the 14 nm manufacturing process and switch to modern 7 nm technology (before the renaming it was referred to as 10 nm Enhanced SuperFin<\/a>). This technology is expected to be very much similar to the TSMC’s 7 nm process used to make AMD processors. So after six years (since Intel Skylake processors) there is finally a big change in the manufacturing process.<\/p>\n

The design of the processors as such is also significantly changed. These are the first processors ever to use a hybrid concept of small and large cores. So something similar to big.LITTLE from ARM. The most powerful of the Alder Lake processors (i.e. the one we’ll be looking at in these tests), the Core i9-12900K, has eight cores, denoted by the letters “P” (Performance) and “E” (Efficient). The Performance cores have high clock speeds and high performance (19% higher than the Rocket Lake and Tiger Lake processors) and support HyperThreading – two threads per core.<\/p>\n

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The details of the Golden Cove architecture are discussed in detail in this article<\/a>. The role of these P cores is to provide performance in games and single-threaded applications. The complementary E cores are then also meant to provide high multi-threaded performance, and are secondarily involved in running low-power processes such as services and background tasks. These cores still have relatively good performance (according to Intel, the IPC is similar to Skylake processors), while needing a significantly smaller die area. In terms of space on a silicon chip, four E cores can fit on a single P core, which is why they’re also referred to as “small” cores, for which we also have an architectural analysis<\/a>.<\/p>\n

The smaller manufacturing process also means a smaller surface area of the entire chip ~209 mm\u00b2 (this is a reduction of more than 24% compared to Rocket Lake), which is naturally associated with poorer heat dissipation from the surface. The chip is soldered to the heat spreader, but this might not be enough for sufficient cooling. Therefore, to maximize heat transfer to the heat sink, Intel has thinned the chip, narrowed the TIM, and in turn increased the thickness of the heat spreader. The latter was also lengthened a bit, which is not primarily due to better cooling properties, but it doesn’t hurt either. The contact area of the IHS is 38 mm in height, but that should be completely covered by the vast majority of heatsink cold plates.<\/p>\n

Also new for these processors is the socket (LGA 1700), where the physical dimensions change after 12 years (from LGA 1156 designed for Lynfield processors). So unfortunately you can’t put Alder Lake processors in LGA 1200 and a new motherboard is needed. It can support either the older DDR4 memory (this usually applies to cheaper boards) or the latest DDR5 memory standard. We have tested with these as well and will continue to test in the future. It’s definitely not as much of a scarecrow as is being spouted around the discussion forums. The timings appear to be high, but the important thing is always the end performance, which across all those applications is very respectable.<\/p>\n

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With DDR5 memory, you may be surprised that diagnostic tools report a four-channel connection even if you physically have only two modules. This is due to the fact that while with DDR4 memory, a single DIMM has a 64-bit data width and behaves as a single channel, this has changed with DDR5 memory. Each module is internally divided into two channels of 32 bits each. So if you “dual-channel” two DDR5 modules, from the memory controller’s point of view, it’s a four-channel 32-bit connection (instead of two 64-bit channels). But you don’t have to worry about it, functionally it’s more or less the same as the DDR4 channel.<\/p>\n

PCI Express 5.0 support is also being introduced with Alder Lake processors. This new bus will be able to be used on \u00d716 (or \u00d78) slots for graphics cards.<\/p>\n