AMD Strix Point: 3nm Ryzen 8000 with Zen 5 cores to be big.LITTLE

AMD Strix Point: 3nm APU based on Zen 5… and little cores?

We’ve known for a long time that Intel’s next processors will be hybrid in both laptops and even desktops, combining little and big cores in the manner of big.LITTLE ARM processors in mobile phones. Some doubt remains about the viability of this approach with Windows platform or PC in general. But now there are reports that it’s not going to be just Intel. AMD could also go for similar hybrid architecture.

The current information is from a relatively unproven source, so we should stay sceptical and be ready for it turning out to be a speculation or fake. But if it were real, things would getvery interesting. According to Moepc, AMD will allegedly introduce its own big.LITTLE architecture together with Zen 5 processors. More precisely, we are talking about APUs with Zen 5 cores, i.e. processors with integrated graphics, which are used in laptops (but also desktops).

Strix Point

The APUs with Zen 5 cores are said to be called “Strix Point” internally. A different leaker Vegeta (who has recently come up with a piece of AMD’s roadmap showing Raphael processors) mentions the same code name. The match could be an interesting credential, but Vegeta was the first to tweet about “Strix Point” before the news about big.LITTLE from Moepc, so it doesn’t mean much.

The Strix Point APUs could reportedly have eight big Zen 5 cores and four little power-efficient cores. Unfortunately, Moepc does not say anything about what architecture the little cores are supposed to use, or exactly what their performance would look like. I.e. whether their purpose would be to increase multi-threaded performance – in which case AMD might use relatively fast out-of-order cores, which is the approach Apple and seemingly also Intel have taken – or just purely to save energy when idle. Then it could even be an in-order architecture akin to what is used by ARM in Cortex-A55.

AMD Roadmaps from Investor Presentation (June 2020): CPU architectures. Zen 5 and 3nm chips are not yet present in any published roadmaps (Source: AMD)

Since the Jaguar cores, which had no follow-ups and their development team has largely moved on to other companies, AMD does not have a separate little core architecture like what Intel is building in the form of Atom. In 2016, AMD has actually believed (or at least stated so) that Zen and its later iterations could span both high-performance and low-power/cost-effective processors with a single architecture. If Strix Point is not a fake news, AMD has changed its mind and might be developing little cores again. Unless there is some shocker underlying story like AMD planning to switch to ARM instruction set by that time (or that it will use x86 only on big core, while the little ones go ARM, bizarre as that would be).


According to this source, Strix Point is supposed to go on the market as Ryzen 8000, but it should probably not be released before 2024. These processors are said to be manufactured on a 3nm TSMC process. This would mean that the company would jump onto this process right after the first 5nm processors with Zen 4 architecture, which will be released in 2022 as Ryzen 7000 (5nm APUs with Zen 4 cores, which are said to be codenamed Phoenix) – we’ll see if this statement turns out to be true.

This would create a gap in 2023 if the Ryzen 7000 is to be released as early as 2022. But this could be explained if Ryzen 7000 (5nm/Zen 4) ended up launching at the end of 2022 and Ryzen 8000 (3nm/Zen 5) managed to launch the beginning of 2024.

AMD processor roadmap compiled from pieces leaked over time. The actual release dates of high-performance processors from the top row seem to have been delayed compared to the outline shown, since the time the original slide was made. Strix Point APU would follow Phoenix APU, which should be to the right of the Rembrandt generation seen on the roadmap (Source: MebiuW/Vegeta, compilation:

Up to 20–29% higher IPC than Zen 4 and L4 cache?

According to Moepc, the specifications and internal performance goals are already set by AMD. Zen 5 is said to improve performance per 1 MHz (IPC) by 20%, or a little more (“+2X%”) over the Zen 4 architecture. The specification of the integrated GPU is also said to be decided and the performance goal is also set, but Moepc does not yet reveal these.

Interestingly, the memory subsystem is supposed to be changed, while the second leaker from Twitter mentions that the APU could have an L4 cache. Could that be a hint that the integrated graphics is going to include Infinity Cache and make it available to CPU cores as an L4 cache? Who knows. All this must be taken with the oft-mentioned grain of salt, because we really can’t be sure if these less established leakers aren’t just making stuff up.

Given that the release may still be three years away, there’s chance that even if this information is legitimate, AMD may yet change plans, alter specifications, or remove some features that were or still are being considered now. We are eager to find what will turn out to be true from these reports, in the end.

Sources: Moepc, Vegeta (1, 2, 3)

Translated, original text by:
Jan Olšan, editor for

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