Big updates for XMP, Dynamic Memory Boost, but also speed restrictions based on module and slot count
Intel has unveiled the Alder Lake CPUs last week, and we covered the SKUs, features and specs here. There’s more further news, Intel has revealed a number of interesting details about the DDR5 memory support. There’s new generation of auto overclocking via XMP profiles coming, XMP 3.0, which has been significantly modified for DDR5 memory. And particularly the Dynamic memory Boost is a breakthrough feature for high-performance RAM.
We have not paid much attention to memory in the article about CPUs, but this chapter turns out to be a more comprehensive topic. General properties and news of the DDR5 memory have already been discussed here, should you want to remind yourself.
Quad Channel DDR5?
One of the first things you might encounter with Alder Lake is that CPU-Z will indicate that you have a four channel memory controller („Quad Channel“). Until now, this has been the privilege of Threadrippers or Intel X99/X299 platforms and similar hardware. Such reporting is not incorrect, because every DDR5 module behaves as two independent channels (or logical channels) from the perspective of the memory controller. While in the case of DDR4 a single module behaves as a single 64bit channel, in the case of DDR5 a change has been conducted whereby a module has been split into two 32bit channels. With two modules you therefore have four logical channels with 32bit width each.
From the point of view of the theoretical bandwidth there is no actual change, the benefit of two “pseudo channels” within a single module rests on their ability to support two independent accesses at the same time. So despite the theoretical bandwidth not being changed, it becomes possible to yield a higher practically achievable bandwidth and thereby a higher performance out of that same theoretical potential.
This might cause confusion, perhaps it might be better to keep referring to this setup as two channels. You might therefore find the same Alder Lake setup is sometimes given the dual-channel label as well as the quad-channel label (e.g. in CPU-Z). Perhaps the ideal way to handle this would be to start to state the controller width, instead of the number of channels, as is done with GPU. Using this terminology, Alder Lake has a memory controller with a width of 128bit, just like all prior mainstream platforms (2×64 bits with DDR4 and 4×32 bits with DDR5).
Maximum supported frequency now depends on both the amount of modules and the amount of slots.
The second thing we did not mention in the main article: Alder Lake officially supports DDR5-4800, therefore the effective frequency of 4800 MHz, but this does not apply to all possible configurations. The officially supported frequency varies depending on the amount of modules, this is quite similar to various limitations with the first Ryzen generation. You can see how it looks like for Alder Lake on the following chart.
Intel states that DDR5-4800 is officially supported only with two modules (not with four), however this is not the only condition. This speed level is in addition only supported if the mainboard simultaneously has just two physical DIMM slots, where every channel has only a singular slot (the chart lists this as “1 SPC”). Such mainboards have the highest signal quality (for this reason overclockers sometimes show interest in ultra cheap mainboards with only two slots). This is why DDR5-4800 is only officially supported with such.
If a mainboard has four DIMM slots for memory modules (marked in the chart as “2 SPC”), it has an official maximum of only DDR5-4400 and this only in the case that every channel has only a single populated slot out of the two. This is by the way the frequency Intel has used for measuring their own official benchmarks presented during the Alder Lake launch event. If four modules are installed (“2 DPC” in the chart), the frequency drops even lower to DDR5-4000 in the case of single rank modules (“1 R” in the chart). Dual-rank type modules (marked “2 R” in the chart, these are usually the high capacity ones with chips on both sides of the PCB) have an official maximum of DDR4-3600. With only two active modules the maximums for SR and DR is equal, a difference only arises when four modules are installed.
Higher frequencies will be possible unofficially
Don’t worry about this chart too much though, those are merely frequencies Intel is willing to officially guarantee. This does not mean that you can not get more. Quite the opposite, since Intel is more conservative in its specifications when compared with AMD. So if you use modules with XMP profiles, the frequency can be set much higher. It is likely that in reality it will be possible to achieve quite high frequencies above DDR-4800, even with four modules. But this remains to be shown by tests and user experiences and we’ll likely have better insight once the platform has been used in the wild for a few weeks or months.
XMP 3.0 with DDR5: save your own settings right to the module’s SPD
XMP profiles are something that we have started to treat like the most natural occurrence, however in the world of desktop PCs they are actually something that is quite important and not at all obvious. The official performance levels of DDR3, DDR4 and currently DDR5 are defined by particular standards known as JEDEC speeds. But those standards are practically never used in desktop PCs now (unless you have an OEM box from a major vendor – Acer, HP, Dell, Lenovo, etc.). These JEDEC standards use relatively low frequencies and also come with very bad (loose) timings.
During the era of DDR3 Intel has introduced the so called XMP (Extreme Memory Profiles) profiles – this is a secondary setting over the common JEDEC setting saved in SPD and has a higher memory clock as well as better timings. It is basically a factory-set memory overclocking and all higher-performing RAM modules now use such profiles. If for example, you own a DDR4-3200 module, it likely is a DDR4-2666 or even a DDR4-2133, which by enabling the XMP in BIOS switches to a higher frequency and better timings (this is usually achieved via a higher voltage). This also has its downsides. Such XMP configurations have generally only been tested with Intel CPUs, so when the Ryzen CPUs have been released by AMD, the memory modules have not always been stable after enabling the XMP profile.
DDR5 memory modules will not be different and high performance speeds will also be realised primarily with the help of XMP profiles (until now the highest official JEDEC standard has been DDR5-4800, faster 5200 and 6400 versions have only been announced this last week). For DDR5, Intel has introduced updated and improved profiles called XMP 3.0.
Writeable SPD/XMP for user timing profiles
With XMP 3.0, the modules will provide more storage capacity for profiles, 384 bytes instead of 102 with DDR4 (XMP 2.0). Simultaneously it will be possible to store more selectable configurations – five instead of two. As a new feature, the labels will now be allowed to be longer and more descriptive, for better orientation in the profile’s nature and usage.
Out of the five different XMP configuration profiles which can be stored in the module, three can be pre-programmed and read-only (neither changeable nor removable). A big innovation is the fact that the remaining two profiles will be writeable, the user will be able to save his or her own manually created OC settings in them. The profiles should be retained across reboots, shutdowns and even transfers to a different PC. Additionally they can be labelled with the previously mentioned longer descriptive names too.
Such user-saved profiles should be protected by checksums, but naturally caution is advised. Transferability between different mainboards and CPUs will not always be 100% – what might work with perfect stability in one PC might trigger errors, BSODs and system reboots in another.
Dynamic Memory Boost: Turbo Boost/Cool&Quiet, but with RAM
The biggest novelty that Alder Lake brings to memory modules is likely something different though: dynamic memory frequency change is coming to desktop PCs, which is something that has not been supported till now. While it is common for CPU cores to be downclocked and undervolted while running idle (and further exploiting various power saving states), in order to conserve energy to only a fraction of the power they need while fully loaded, this has not been applied to memory modules, so far.
That is despite high memory frequencies having a considerable impact on power consumption. For example: the difference between the operation of DDR4 memory modules running in XMP mode with the frequency of 3600 MHz (and with a voltage of 1,2 V) and the default basic frequency of 2666 MHz without XMP and with the default voltage of 1,1 V can be as high as about 10 W in the power consumption of the CPU itself (mainly by the memory controller) and there is possibly further difference in in the power consumption of the actual modules.
With Alder Lake Intel has therefore added the technology called Dynamic Memory Boost, that newly enables a dynamic frequency change in desktop memory modules. It is not even tied to the DDR5 exclusively, Alder Lake should be able to apply this with DDR4 as well.
It will work as follows: The CPU will, while operating, enable switching between the faster XMP settings and the slower but less power consuming basic mode. If you launch an application that demands a higher performance, the CPU will toggle the higher RAM speed. When the computer is idle it will switch to the lower-speed basic mode. It is thereby a tool that decreases the power consumption of high-performance PCs, while idle, or during light tasks like for example browsing of the internet is (or at least should be).
It can be used with Intel Alder Lake CPUs and DDR5 as well as DDR4 memory modules that provide an XMP profile they can be switched to. It should work without any OS assistance, everything is executed on the level of firmware/automated CPU control. This function will be available in BIOS. Unfortunately it reportedly will not be possible to change which XMP profile gets used by this feature, the first XMP profile present will always be used, even if multiple are available.
Memory modules running at higher frequencies and tighter timings are often the source of instability, therefore a dynamic switching will pose further demands on testing in order for the CPU to maintain stable operation.
From the point of view of reducing the power consumption of desktops (and maybe even some compact SFF computers) this function is very beneficial and, honestly, should have been introduced sooner. It is nevertheless a pleasant surprise. But so far we did not yet have had the opportunity to test it in practise so it remains to be checked how well does it perform and if the switching does not introduce instability. In any case it is something we hope AMD will adopt and implement as well.
Jan Olšan, editor for Cnews.cz
English translation and edit by Karol Démuth, original text by Jan Olšan, editor for Cnews.cz
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