AM6 socket due in 2030. Even Zen 7 will come to AM5 boards

For a time, we weren’t sure whether AMD would stick with the current AM5 socket—used for Zen 4 and Zen 5 desktop CPUs (Ryzen 7000, 8000, and 9000)—and extend support to the next generation with Zen 6 cores. Multiple sources have now confirmed it will. What’s more, AM5 may last even longer: evidence suggests these motherboards could eventually accept upgrades to processors using an entirely new architecture.

As a reminder, based on leaks so far processors with the Zen 6 architecture are strongly indicated for release next year for the desktop segment (while mobile APUs for laptops may follow after the New Year). These desktop models will utilize the AM5 socket and are expected to be compatible with motherboards featuring the 600- and 800-series chipsets.

Recently, three major motherboard manufacturers—Asus, ASRock, and MSI—have officially stated that Zen 6 will use the AM5 socket, solidifying this as a confirmed fact. The recent emergence of motherboards with larger Flash memory (64 MB instead of the current 32 MB) for UEFI firmware led to speculation that this might be a requirement for Zen 6 support. However, it currently appears this is not the case, and the 32 MB chips on older boards will likely suffice.

Zen 7 won’t require a new socket

What was not widely anticipated or considered a given, however, concerns the subsequent generation, the Zen 7 architecture. Its release is tentatively expected around 2028 (a late 2027 launch is possible in theory but considered less likely). According to information now shared by the reasonably reliable leaker Kepler_L2, even when this architecture comes, the desktop processors based on it will reportedly continue to use the current socket.

Kepler_L2 indicates that the AM6 socket (or whatever the next platform is named) is still approximately five years away. This is a rough estimate with some tolerance, so it may not be exactly 60 months from today. Nevertheless, a 2030 release would mean this new socket arrives two years after the expected timeframe for Zen 7. This strongly suggests Zen 7 will remain on AM5, with the next socket likely debuting with the generation after that, presumably Zen 8 (assuming AMD retains that naming convention).

AM5 socket for AMD Ryzen CPUs (photo: Ľubomír Samák)

This implies that current AM5 motherboards (some of which have been in use since 2022) could potentially be upgraded with new, cutting-edge CPUs as far out as 2028. In practice, this would grant the AM5 platform an even longer functional lifespan than the celebrated AM4 platform, where the first Ryzen generation launched in 2017 and the last truly new architecture arrived in 2020 or 2022 if we choose to consider the Ryzen 5000 X3D processors as something equivalent in merit to a new microarchiteture generation.

Naturally, this information remains unconfirmed for now. The possibility of future developments altering this roadmap cannot be entirely ruled out.

Long wait ahead for next-generation memory

This extended socket longevity carries a potential drawback. If Zen 7 remains on AM5, it will still be constrained by 128-bit DDR5 memory and its relatively limited bandwidth. JEDEC recently announced official support for DDR5-9200 speeds, yielding a bandwidth of 147.2 GB/s. In contrast, future LPDDR6 or DDR6 memory standards are expected to deliver over 200 GB/s, as they will widen the memory controller’s channels, which means client processors could potentially switch to 192-bit bus width.

Consequently, memory bandwidth could become a notable weakness for AMD’s desktop processors in the 2028–2030 timeframe, particularly when compared to higher price tier Apple processors featuring 256-bit or even 512-bit memory interfaces. The impact seen in practice remains to be seen. In gaming usage, this limitation will likely be significantly mitigated by 3D V-Cache technology. However, bandwidth could become a more critical bottleneck in certain types of professional software applications. However, it remains possible that AMD will develop further cache or other architectural enhancements to compensate for the narrower memory interface even in those scenarios.

Sources: ComputerBase, Kepler_L2

English translation and edit by Jozef Dudáš

Contents

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