We previously covered information about Intel’s future Razor Lake processors, expected to launch as the Core Ultra 500 generation likely at the end of 2027 (that is, after the upcoming Nova Lake generation). Moore’s Law is Dead, who leaked those details, also revealed information about the following generations—Titan Lake and Hammer Lake. These are even further out, but they will introduce a long‑awaited, radical architectural shift.
Details of Titan Lake processors
Titan Lake processors are expected to belong to the generation following Razor Lake, likely launching as Core Ultra 600—probably in 2028, or perhaps early 2029. According to Moore’s Law is Dead, Intel plans this generation exclusively for laptops, similar to how it panned out with this year’s Panther Lake.
Last year, some online coverage speculated that Titan Lake could feature up to 100 cores, but this was actually incorrect information—the notion originated from misquoted fan speculation on social media (which was even explicitly labeled as personal “what if” musing, not a leak, so the error lies with the articles that presented it as fact). Intel never planned anything of the sort, and Titan Lake’s actual specifications are far more grounded.
Copper Shark core
One of the most interesting findings is that, despite earlier doubts, Titan Lake will likely be the first generation to introduce Intel’s so‑called Unified Core architecture, abandoning the current fully hybrid big.LITTLE design, as we previously reported. This does not mean the end of big and small cores. Those remain—but both P‑Cores and E‑Cores will be based on the same architecture. This is similar to AMD’s approach with large and compact cores (e.g., Zen 5 and Zen 5c). There may still be differences in IPC and achievable clock speeds, which could also happen at AMD in the future. In any case, the CPU should behave more predictably, with fewer issues related to uneven performance or the various complications (real or imagined) associated with hybrid big.LITTLE processors.
The first unified core architecture is reportedly named Copper Shark. We already knew it would be used as an E‑Core, while the P‑Core name was unknown. Now it appears that the P‑Core is actually also Copper Shark: Intel refers to the compact and full‑size variants internally as Copper Shark‑E and Copper Shark‑P. Assuming the documents obtained by Moore’s Law is Dead are genuine, of course.
Intel’s (improved) 1.8 nm process
A potentially less positive detail is that Titan Lake’s CPU chiplets will not use TSMC’s process, but Intel’s own 1.8 nm node. This may be a newer variant (possibly Intel 18A‑U, an even higher‑performance version than the first enhanced 18A‑P), but it still raises the question of whether TSMC’s 2 nm process would be superior. Expecting Intel to reach clock speeds comparable to TSMC’s N2 and N2P nodes—when today’s 18A lags behind even the weaker N3B—is a bold assumption.
The SoC chiplet (“HUB”) will be manufactured on the same process as Nova Lake, likely 18A‑P (unless this is an error and it’s the base 18A). It will include four LP E‑Cores based on the Arctic Wolf architecture, not Copper Shark. This suggests an evolutionary SoC design derived from Nova Lake, with minimal changes to reduce development cost and time (Copper Shark may also be physically larger and harder to implement as an LP core). The SoC chiplet is not identical to Nova Lake’s—it appears Intel will add more multimedia engines and, importantly, a new memory controller. It will reportedly support not only DDR5 and LPDDR5X with a 128‑bit width, but also LPDDR6 with a 192‑bit width, which would dramatically increase memory bandwidth.
GPU chiplets will come in two versions: A smaller 1.8 nm variant (same as the SoC) with four Xe Cores (512 shaders) based on Xe3P; and a larger, more powerful variant with 16 Xe Cores (2048 shaders), manufactured on TSMC’s 2 nm N2P process.
The processors will again include a PCD chiplet providing functionality previously integrated elsewhere—such as a Thunderbolt 5 controller. This too appears to be an evolution of the Nova Lake chiplet rather than a direct reuse.
Titan Lake variants
The cheapest Titan Lake version, Titan Lake‑U (TTL‑U), will likely use a CPU chiplet with four Copper Shark‑P P‑Cores and zero E‑Cores, plus four LP E‑Cores (using Arctic Wolf) from the SoC chiplet—for a total of 8 cores (4+0+4). The GPU will use the smaller 4‑Xe‑Core chiplet, though it may be cut down to just two units, using salvaged dies.
The more powerful Titan Lake‑P (TTL‑P) will use a larger CPU chiplet with 4 P‑Cores and 8 E‑Cores (Copper Shark‑P and Copper Shark‑E), plus four LP E‑Cores from the SoC (total 4+8+4). The GPU will again be the smaller 4‑Xe‑Core chiplet.
The third variant, Titan Lake‑PX (TTL‑PX), will use the same CPU chiplet (4 P‑Cores + 8 E‑Cores) and the same four LP E‑Cores from the SoC. The difference is that Intel will pair it with the high‑performance GPU chiplet manufactured at TSMC with 16 Xe Cores (2048 shaders). This segmentation resembles the model structure of this year’s Core Ultra 300 “Panther Lake” generation, though the high‑end GPU option will be even stronger.
Processors with integrated Nvidia GPUs
Where Titan Lake diverges from the Panther Lake pattern is in two new processor variants labeled B and BX. These two versions will reportedly include integrated Nvidia GPUs. The collaboration was announced last summer, alongside the headline‑making news that Nvidia was acquiring a stake in Intel.
The result will likely resemble the GB10 / N1X processor that Nvidia co‑developed with MediaTek: Nvidia will design and manufacture the GPU chiplet, and Intel will then integrate it into its CPU package, adding the necessary interface logic.
Interestingly, the B and BX variants—though listed in Intel’s roadmap alongside Titan Lake—do not use Titan Lake CPU chiplets. Instead, they use CPU chiplets from Razor Lake (manufactured on TSMC’s N2P), featuring its Griffin Cove P‑Cores and Arctic Wolf E‑Cores. This may be because the Nvidia‑integrated product needed faster development—or because Titan Lake lacks a high‑core‑count CPU chiplet. The SoC chiplet, however, should be the same as Titan Lake’s. These processors will exclusively use LPDDR6 with a 192‑bit width; DDR5 and LPDDR5X will not be supported (likely to ensure sufficient bandwidth for the GeForce GPU).
The higher‑performance variant Titan Lake‑BX will use a Razor Lake CPU chiplet with 8 P‑Cores and 16 E‑Cores, plus four LP E‑Cores (for a total of 8+16+4 cores). Attached to it will be an Nvidia GPU, though the leaked documents do not specify its architecture or number of compute units—only that it will use a high‑performance configuration (literally “Large”).
Parallel to that, there will also be a cheaper and more power‑efficient variant Titan Lake‑B. It uses the same SoC chiplet but a GPU in the “Medium” configuration, meaning somewhat lower performance. It’s unclear whether this is a different GPU chiplet or the same one with some units disabled. Interestingly, the B processor is said to use a 2 nm CPU chiplet also belonging to the Razor Lake generation, but with only 4 P‑Cores (Griffin Cove) and 8 E‑Cores (Arctic Wolf), with the SoC chiplet again adding four LP E‑Cores (for a total of 4+8+4). Surprisingly, such a chiplet did not appear in the leaked information about Razor Lake desktop and notebook processors we discussed yesterday. This chiplet may have been left over from cancelled lower‑end Razor Lake notebook CPUs (U, H, and P series), which Intel ultimately replaced with refreshed Nova Lake models. Ironically, it may now end up only being used in Titan Lake. It’s also possible Intel will still base some cheaper Razor Lake desktop models on it, and those simply weren’t included in the leaked documents for whatever reason.
Serpent Lake?
According to earlier leaks from other sources, processors with Nvidia GPUs were supposed to be codenamed “Serpent Lake,” which contradicts the documents obtained by Moore’s Law is Dead that classify them under Titan Lake. This may be the result of internal inconsistency between documents from different Intel teams. It’s possible the renaming to Serpent Lake happened relatively late, and internal documents and engineers still use the old designation. A different name would also make sense given that these CPUs use different CPU chiplets than Titan Lake.
Hammer Lake: Thunder Shark unified core with re-established HT
Moore’s Law is Dead has not yet shown detailed information about the next generation, Hammer Lake. But he revealed that it will include Thunder Hawk cores, again in both P‑Core and compact/small E‑Core versions. However, these will not be two entirely different architectures like today’s P‑Cores and E‑Cores. According to Moore’s Law is Dead, Thunder Hawk will again be part of the unified‑core family—likely the second generation, improved over Copper Shark.
According to Moore’s Law is Dead, Thunder Hawk will introduce one major change: it will bring back HT (or SMT), meaning it will again support multiple threads per core, improving multithreaded performance. This core will support HT despite belonging to the lineage of today’s Atom/E‑Cores. It will be the first time these cores use this technology. The very first Atom processors did have HT, but that was a completely different in‑order architecture (codenamed Bonnell), whereas the E‑Core line began with the out‑of‑order Silvermont architecture introduced in 2013.
Gaming chip with only large cores
While the configurations of Hammer Lake processors have not yet appeared in leaks, one detail has been revealed. Similar to the Razor Lake generation, Intel is planning a special chiplet composed exclusively of P‑Cores and a large cache (BLLC) for gaming PCs. Again, it is supposed to have 8 P‑Cores and no compact E‑Cores (aside from the LP E‑Cores in the SoC part of the processor, which will likely remain). This time, however, the P‑Cores will support HT, so the processor would have 16 threads plus additional threads supplied by the LP E‑Cores from the SoC chiplet (whether those will support HT is not yet known).
This CPU‑chiplet variant could again be used for relatively affordable gaming processors competing with cheaper X3D Ryzens—the same intention Intel likely has with the eight‑core (all P‑Core) chiplet in the Razor Lake generation discussed in the previous article.
Hammer Lake will still support LGA 1954 motherboards
Hammer Lake, unlike Titan Lake, will exist in a desktop version and—notably—according to documents Moore’s Law is Dead claims to have obtained, it will continue using the same platform as Nova Lake and Razor Lake, meaning the LGA 1954 socket. Motherboards for this platform should therefore receive at least three generations of processors. Earlier optimistic reports even mentioned four, though that likely counted Titan Lake. That generation, however, appears to be laptop‑only and will be skipped on desktop just like Panther Lake. Even so, the platform should last four years.
Will Hammer Lake be the Core Ultra 600 or 700 generation?
Previous analyses of Intel’s leaked plans assumed Titan Lake would be the Core Ultra 600 generation and Hammer Lake the next one—Core Ultra 700. As such, Hammer Lake would logically launch a year later, meaning late 2029 or even early 2030. But some internal documents Moore’s Law is Dead allegedly obtained from Intel seem to suggest Titan Lake may be more of a parallel companion to Hammer Lake, with Hammer Lake covering market segments Titan Lake will not—for example, desktop processors. Theoretically, Hammer Lake could therefore launch earlier and be part of the Core Ultra 600 generation.
However, this conflicts with the fact that Titan Lake uses Copper Shark CPU cores, while Hammer Lake is reportedly already based on the next‑generation Thunder Hawk core (with HT, so it’s unlikely the changed name reflects just a refresh or a process node change). Based on that, Hammer Lake is more likely still to be the next generation—Core Ultra 700. It is possible, though, that Titan Lake will remain on the market longer and overlap with Hammer Lake in its later phase.
Titan Lake may also launch later than usual (for mobile Core Ultra 600, the typical release window would be January 2029), and the timing and classification of these families may be less predictable than Intel’s usual cadence. Note that delays and schedule slips can also intervene in Intel’s original plans. As a result, these more distant generations could shift by a year, with a refresh inserted between them—similar to what happened with Raptor Lake.
It should be emphasized that Titan Lake—and especially Hammer Lake—are still quite far from release. Therefore, some details may change. For example, certain new features may fail validation and Intel may disable them before launch (such as HT). Or some processor variants may be cancelled. That is simply how it goes with reports on future products.
Source: Moore’s Law is Dead
English translation and edit by Jozef Dudáš
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