Recently, we reported that the Intel LGA 1851 platform with Core Ultra 200 (“Arrow Lake”) processors will premiere certain memory innovation – CUDIMM modules that have an integrated clock driver (CKD) that enables operation at (hopefully) higher clock speeds. It was unclear for a while whether this would end up being an Intel exclusive feature, but now it looks like CUDIMMs will be usable on AM5 boards with Ryzen processors as well.
Support for CUDIMM modules could possibly be announced with the X870 and X870E chipset boards that are coming out now. This is according to information disclosed by MSI in one of the presentations of the new boards in Asia. MSI states that the boards with X870 and X870E chipsets will have an improved PCB and memory slot design, which is supposed to improve the ability to run stably at high clock speeds – due to the fact that the signal will be of higher quality and less degraded on the way from the processor to the modules. But that’s not all, part of the news is also to support CUDIMM memory, i.e. those modules with built-in clock driver (CKD). MSI has confirmed that this feature will also be supported on Ryzen processors. It is not yet clear whether it is envisaged that it will eventually also be supported on older boards with 600 generation chipsets (such as B650, X670 and their “E” variants), or whether it will only be officially supported on 800 generation platforms.
- Read more: DDR5 with CKD: Clock driver enables high clock speeds without raising voltage
- Read more: Intel Arrow Lake processors are capable of 10GHz DDR5 memory, thanks to CUDIMM
CUDIMM for Ryzen 9000 (and 8000) as well
Initial (but perhaps incomplete yet, more on that in a moment) support should already be in AGESA 1.2.0.0 and AGESA 1.2.0.1, while BIOSes are now slowly appearing with the subsequent version 1.2.0.2, which cuts the long latency when communicating between CCXs on Ryzen 9 9900X and 9950X.
TOPCC, an overclocker and MSI employee, has posted a video discussing CUDIMMs (but also CAMM2 modules, which MSI is also trying out) and confirming that they are working on bringing support for them to the AMD platform. However, for now, it will apparently be limited to the new Ryzen 9000 processors with Zen 5 architecture and Ryzen 8000, which are desktop APUs based on the Hawk Point chip.
Ryzen 7000 (desktop models with Zen 4 architecture) are not supported, but this might not be a hardware limitation as much as an incompatibility with their firmware. Therefore, it is possible that they will still get support later. The development of new features and technologies often works in a phased manner, where they are released for the highest priority products first and the rest follow later. Anyway, at the moment, some unresolved compatibility issue is said to be preventing CUDIMMs from working with Ryzen 7000 processors.
CUDIMMs do not seem to work in a completely transparent way for the host platform, which has to support them to some extent. From the TOPCC video, it seems that by default the CKD chip generating the signal for the module is not used, so if you fit the module into an older board without official support, it should work, but in “bypass” mode, where it behaves like a regular module without CKD (so without the benefits of CUDIMM). However, Ryzen 7000 seems to have some problem with this bypass mode, which means that the computer will not boot with such a module.
In order to use the module as a CU-DIMM with the clock signal for the chips provided by the CKD chip on the module, proper initialization is required, which is probably why this technology needs a compatible processor and a new (modified) version of the AGESA firmware. According to TOPCC, it is possible that these modules will be automatically detected in the boards and set to low clock speeds such as DDR5-3600, which will need to be automatically changed to the desired faster profile, or alternatively the board will set the profile automatically after boot.
It is not yet clear from the available information whether CUDIMMs with active CKD will actually be enabled immediately upon release, or whether this will come in later firmware updates. This will hopefully become clearer after official announcements of CUDIMM support. However, it is also possible that the official enablementand announcements will wait until the actual availability of CUDIMM modules in stores.
Will CUDIMM benefit Ryzen?
However, it remains to be seen how much the fast memory will help on Ryzen, as AMD architecture is different from Intel’s, and the optimal speed for Ryzen CPUs on AM5 is DDR5-6000 or DDR5-6400 at 1:1, without the divider that is needed for higher clock speeds (note: Intel also uses a 1:2 divider for DDR5, called Gear 2). Enabling the 1:2 divider degrades latency, which eliminates some of the benefit of higher bandwidth. Above DDR5-8000, however, the benefit of higher bandwidth might offset the penalty and bring more overall performance. There is, however, one more thing.
For AMD, memory bandwidth may not be the main limiting factor, because at the same time the Infinity Fabric interconnect between the IO chiplet and the CPU chiplet (the CPU cores contained therein) also has its own bandwidth limit. The bandwidth between the IO chiplet and the CPU chiplet should be 32 bytes per cycle for reads (and 16 bytes per cycle for writes, for which the bandwidth is halved, since normal workloads don’t have anywhere near a 1:1 read-to-write ratio; AMD has been using this trick to optimise the link power and silicon footprint since Ryzen 3000). If you run Infinity Fabric at 2000 MHz, this should mean that a single CPU chiplet can read data from memory at a maximum of 64 GB/s, and combined writes and reads can be at a maximum of 96 GB/s, although with DDR5-10000 modules you should theoretically have a bandwidth of up to 160 GB/s.
This means that only the Ryzen 9 9900X and 9950X processors will take full advantage of the extreme memory speeds, as they have cores in two chiplets, each with one such interface to the IO chiplet, so twice the bandwidth can be used in multi-threaded tasks. So, in theory, they should see a performance increase in applications that are currently bottlenecked by memory bandwidth (you might see it in yCruncher with AVX-512, for example).
Increasing the memory clock speed can have a secondary positive effect even if the program does not directly benefit from the higher bandwidth. This is because if the latency in cycles is the same, one cycle is shorter at a higher clock speed. For this reason, higher clock speeds can also help in games (unless they are achieved by relaxing cycle latencies). So it is not entirely impossible that CUDIMMs will also help in games. We just can’t expect big benefits, because it will be mainly this secondary effect at work (and it will still have to overcome the effect of latency degradation due to the use of the 1:2 divider first, before starting to bring in its own benefits).
Sources: TOPCC, VideoCardz
English translation and edit by Jozef Dudáš
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