More on Zen 5 from RedGamingTech
Last week we wrote about leaked information on AMD’s Zen 5 processor architecture, published on the RedGamingTech youtube channel. Such information tends to be of rumor nature, so it should probably be treated with caution for now. However, the details this source gives are quite interesting, and now they have added some more specifics, so it is worthy to cover them, even if we have to keep in mind to not take it for granted.
In the last batch of information, it was already announced that the high-end desktop Zen 5s for socket AM5 (so something like Ryzen 9 8950X, if AMD sticks to the current branding) should have 32 cores. RedGamingTech reports that AMD actually wants to double the core count and that could apply to their product line-up more or less generally, not just this model. The core-count increase is supposed to also happen in servers and Threadrippers as well, though it’s said to not necessarily also mean +100% there. So the most powerful processors outside the mainstream desktop could have as many as 192-256 cores, though it’s probably better to temper expectations and expect the final count possibly be lower.
16-core CCX
What is an important new detail given by RedGamingTech that has not been heard so far and can be confronted with reality in the future, is the configuration of the cores in the chips. Zen 5 will reportedly use CCX blocks with 16 cores, which the individual processors will be built from. The base CCX block was quad-core in Zen 1 and 2, and is octa-core in Zen 3 and probably Zen 4 too. So Zen 5 should bring a further increase in the number of cores in the CCX. The CPU compute die will likely be 16 cores, so those powerful processors for socket AM5 with 32 cores will have one IO die and two CPU compute dies as today.
The increase in the number of cores in CCX to eight in Zen 3 was made possible by switching the intra-CCX interconnect (for the record, this is unrelated to the Infinity Fabric interconnecting individual CCXs) from crossbar, which is a fully-connected topology (all cores have direct connection), to a ring bus. Whether the increase to sixteen cores will again imply any change to the internal interconnect topology in CCX remains to be seen.
It should be added that 16-core CCX does not mean that all processors will have such high core counts. AMD has been able to develop chips with previous architectures that had the CCX block shrunk, for example the 14nm chips with only two Zen 1 cores used in Athlon processors where the CCX was essentially cut in half. In addition there will be processors sold where some of the physically present cores will be disabled, as always.
High IPC without any clock speed loss?
Last time RGT reported that various sources promise an increase in IPC (i.e. performance per 1 MHz) up to around 30 % compared to Zen 4 (one source says +32 %, another +29 %). That would be a very high jump, which immediately raises the question whether it might have a downside in the form of reduced core frequencies. AMD is rumored to increase the L1 cache and instead of private L2 caches use one large single L2 shared by the entire CCX, i.e. supposedly 16 cores. This design is similar to Apple’s ARM processor architectures, and those actually have pretty low clock speeds.
More at: First info on AMD Zen 5: IPC and new cache concept
However, according to the rumors, AMD’s internal expectations are that this new architecture should not hurt frequencies. So far these CPUs exist only on paper and in simulations, so these are just projections. Nevertheless, the plan is said to be that the clock speeds actually may be a hair higher than the 5nm Zen 4, which in turn is hopefully also supposed to achieve better frequencies than the Zen 3. Thus, Zen 5 could have both that high IPC and the highest SKUs would still have boost frequencies over 5 GHz. So single-threaded performance could be really high, maybe even as much as 50% better than today’s Ryzen 9 5950X.
That assumes, of course, that these alleged leaks aren’t just somebody making things up. And even if it isn’t an outright lie, there’s always the possibility that the architecture misses the targets and will actually have lower than planned frequencies. This is something that happens quite often in chip design and manufacturing.
Sources reportedly differ on whether the Zen 5 will use a 3nm process, which was originally in the leaked information. Now there is also talk that AMD might switch Zen 5 back to a 4nm process (which is a derivative of 5nm) due to delays and potential problems of 3nm node. However, production is still slated to happen at TSMC in either case.
RedGamingTech reports that according to two sources, AMD has already ported Zen 5 to 4nm, but another third source says they are still sticking to the plan of using 3nm process. However, this might be just repeat of the same speculation that was publicly going on Twitter as well, not new data.
Strong emphasis on power efficiency
Zen 5 is said to put a lot of emphasis on power efficiency. This is to be mainly focus in APUs, i.e. mobile versions (and less in desktop). New dedicated accelerators aimed at the goal of improving efficiency in select tasks, including AI acceleration units, could also reportedly appear.
Zen 5 should supposedly have some added new instructions, but that doesn’t tell us much; this applies to virtually all new architectures, so something like this is safe to assume. Note that when CPU architectures add new instructions, the extensions are sometimes related to various specialised features that are either relatively marginal or don’t directly affect performance all that much (at least not for most users). So this might not be a biggie, in Zen 5.
Zen 5 is a completely new architecture–while Zen 4 will be an evolution of Zen 3 (and Zen 2 was an evolution of Zen 1), here again AMD will be starting largely from scratch. The core may thus contain a large number of innovations and should reportedly represnet the biggest change in the history of Zen cores so far (those alleged cache revamps would make sense for such a deeply rearchitected core). Thus, the compute units may also undergo major changes, and support for various new features and instructions may go hand in hand with this.
Source: RedGamingTech
English translation and edit by Jozef Dudáš, original text by Jan Olšan, editor for Cnews.cz
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- More on Zen 5 from RedGamingTech
