The processor, also referred to as the central processing unit (CPU), is the most fundamental and the most important part of a computer. It is the part that executes all tasks (instructions) that are fed to the computer through program code. At the same time, peripheral devices, RAM and storage (hard drives, SSDs, oreven tape in the past) are connected to it in various ways. It is therefore truly the central element of a computer.
Instruction set
The processor executes machine instructions forming a program, which are not the same as the code written by the programmer—that must first be translated into machine code by a compiler. Machine code corresponds more closely to how the operations are performed by the CPU itself, and its instructions can take many different forms. There are therefore many different so-called instruction sets (also referred to as ISA), which represent a sum of instructions the CPU supports. This set does not have to be static, instead instruction sets usually expand and evolve over time.
Multiple processors typically arise or have arisen based on one particular instruction set, which are then compatible thank to the same instruction set and allow running the same compiled machine code. Such processors then form platforms or families; sometimes we also speak of an “architecture” when referring to such families, but this refers to the instruction set’s architecture, not the architecture of a specific processor core (which is sometimes called a “microarchitecture”).
An ecosystem of operating systems and user software that can be run on computers with a processor of a given instruction set therefore forms around CPU instruction sets—for example, the ecosystem of the Windows operating system, Linux, and similar OSes on Intel, AMD, and Zhaoxin processors that use the x86 instruction set (more precisely, its 64-bit version, sometimes referred to as x64). In mobile phones, there is another such an ecosystem around Arm processors.
“Bitness”
Older processors are often divided into generations designated as 8-bit, 16-bit, 32-bit, and 64-bit (in the past, however, more exotic “irregular” architectures with other “sizes” also appeared). This number characterizing the processor can have various meanings. It mainly denoted the size of the operand (the data value being processed, or more precisely the size of the registers into which these values are stored), but also often the ability to address memory (which is the number of bits forming the address that distinguishes the position of data in memory—the number of bits determines how large the maximum memory capacity that can be worked with is). And to make it more complicated, the processor bus used for data input and output also has its own width in bits (often different). For example, the Motorola 68000 was largely a 32-bit processor (having 32-bit registers), but for cost-saving reasons, the first generations had only 24-bit memory addressing and only a 16-bit data bus, so 32-bit values had to be transferred in two cycles.
8-bit microprocessors (which, however, often had 16-bit memory addressing, as 8-bit addresses give an impractically small capacity) powered the first waves of home computers and business computers from the 1970s that were not yet PC-compatible—for example, the Atari 800, Sinclair ZX Spectrum, Commodore C64, and Apple II families. Significant representatives were the Intel 8080, Zilog Z80 (a compatible evolutionary successor), and MOS Technology 6502 microprocesors.
16-bit processors in personal computers emerged around the turn of the 1970s and 1980s and were, for example, the foundation of the first IBM PCs and compatible devices (with x86 Intel 8088/8086 and Intel 286 processors), from which a large portion of modern computers are derived. Many processors still composed of discrete components were also 16-bit, for example the historically significant DEC PDP-11 computers.
Relatively quickly, in the 1980s, computers transitioned to 32-bit processors (for which 32-bit addresses allow up to 4 GB of RAM), which lasted for a longer period. Examples: Intel 386, 486, Pentium and later, AMD K5, K6, Athlon, the Motorola 68000 family, older generations of MIPS, IBM POWER/PowerPC, Sun SPARC processors.
Around the turn of the century, there was a transition to 64-bit processors, which theoretically allow up to 16 EB (exabytes, i.e., 16,777,216 TB) of memory, which will likely be sufficient for quite a long time. RISC processors were the first to transition to 64-bit architectures; the Athlon 64 and Opteron from AMD were the first 64-bit x86 processors for personal computers. Practically all subsequent AMD and Intel models (from late Pentium 4 and Core 2 models onward) are also 64-bit. Arm processors in mobile phones were the last to transition to a 64-bit instruction set, starting around 2013–2014; since then, this distinction has only been applicable in microcontrollers and embedded cores and chips, where 32bit or even 8-bit architectures still have their use.
Prominent instruction sets
The most important instruction sets used today are the aforementioned x86 and Arm. x86 (x64) derives from the Intel 8086 processor (from 1976) and through gradual evolution gained new instructions and more powerful implementations up to the present day. Alongside Intel, other companies began manufacturing CPUs with this architecture at the time when the 8088 processor (a cheaper version of the 8086) was chosen for the IBM PC, which established the personal computer platform used to this day. The most significant of these other manufacturers is AMD, which has stayed in this market since the 1980s and has become the second, fully-fledged supplier of processors of this instruction set for PCs, also co-steering its future direction (AMD, not Intel, for example, developed the 64-bit evolution of the architecture). The companies recently formed a consortium to harmonize x86 development.
The Arm instruction set appeared slightly later, in 1985, but it only established its current stronghold in the mobile phone market later. The currently used Armv8 and Armv9 versions, however, date only from this century and are a newly designed instruction set, rather than deriving from the line of previous generations of the Arm set—they are not compatible with them). While x86 is historically a CISC-type set, Arm has some RISC features (constant instruction length), but today it already has a large number of often complex instructions, so it no longer corresponds to RISC principles.
Currently, the RISC-V instruction set is gaining significance, having originated in an academic environment and being more in line with the original RISC concept than today’s Arm versions, and has been gradually moved to being implemented in real manufactured processors over the last 10 years. Its advantage is that processors based on it can be manufactured by anyone (unlike x86) and it is not subject to any licensing fees (unlike Arm). Currently, there are no high-performance RISC-V processors for personal computers and servers on the market yet, and the software ecosystem for these areas is also lacking, so the use of processors based on the RISC-V instruction set is currently essentially limited to the embedded device market, embedded cores integrated into chips with other functions (for example, in SSD controllers), and microcontrollers.
Prominent instruction sets of the past
Some prominent instruction sets no longer active today include, for example, the Motorola 68000 (CISC) instruction set; these processors were used by many discontinued computers competing with the PC (Apple, Atari ST, Amiga) as well as game consoles. For a time, several RISC instruction sets were successful in the market: MIPS, SPARC from Sun, and PowerPC or POWER from IBM (alongside which it was manufactured by Motorola and later Freescale); however, they eventually largely lost their markets and significance and were replaced by processors with x86 and Arm instruction sets. A partial exception is Power processors, which survive in proprietary IBM servers and keep their own low-volume market (for now, at least).
A different instruction set is a barrier to software compatibility, and less widespread instruction sets have smaller software ecosystems, which leads to such platforms less competitive with the large and widely established ecosystems of major instruction sets. This is the main reason why these other instruction sets did not survive in the market.
History: What was the CISC versus RISC rivalry about?
Processors and microprocessors initially developed into a form where they had relatively large numbers of instructions, some of which performed quite complex operations like square root or division that took many cycles. Instructions also had varying lengths (different numbers of bytes). This concept, or rather the processors that has gradually evolved into this form mostly spontaneously, was later retrospectively labeled CISC (complex instruction set computer).
Around the turn of the 1970s and 1980s, the concept of RISC processors began to be promoted in contrast to what was retrospectively labeled CISC. RISC processors, on the other hand, have a reduced instruction set (RISC = reduced instruction set computer). This meant that the number of instructions was limited; for example, instructions performing operations with values in memory were removed (instead, the compiler used separate instructions to load data from memory into registers and then an instruction working with the register). Processors did not have complex instructions like division and sometimes not even multiplication, which the software compiler had to replace with a sequence of basic operations at the software level. An important feature was that instructions had a constant length.
The benefit of these simplifications was supposed to be that processors would be easier to design and require fewer transistors, and moreover, advanced techniques like pipelining and out-of-order execution could be used with them. And thus stripping down the processor’s capabilities was ultimately supposed to lead to higher practical performance.
In the 1980s and 1990s, it was assumed that RISC processors would displace older CISC instruction sets including x86. However, it turned out that thanks to the broad market for x86 processors, these processor manufacturers had sufficient resources and motivation to improve their architecture so as to overcome the disadvantages of CISC. Part of this was that processors began internally decomposing many complex operations into simple operations similarly to RISC processors. At the same time, RISC instruction sets tended to gradually increase the number of instructions, and some complex instructions were added back for performance reasons, so the differences gradually blurred. Intel and AMD processors ultimately won the competitive battle against various RISC processors also because they had a larger market behind them.
Today, it can be said that the distinction between RISC and CISC architectures has practically lost its meaning, because virtually all processors on the market today are “something in between” these concepts. Microarchitectures implementing today’s Arm and Power instruction sets will be similarly complex as x86 if they are to have the same performance. Of the original RISC design features, the main trait that has persistent significance is the use of instructions with a constant width, which simplifies the design of instruction decoders and helps achieving high performance more easily (as opposed to x86 processors with their variable instruction length).
FPU, SIMD, and matrix extensions
Expanding the capabilities of processors is something that has happened and continues to happen with practically all instruction sets. In addition to the original integer and arithmetic-logic operations performed by ALUs, instructions working with floating-point data were later added. Support for these operations, however, was not always part of the processor. For a time, it was provided by separate FPU (floating point unit) chips implementing these instructions (x86 platform FPUs were designated 287, 387, or 487 by Intel, hence these instructions are referred to as x87).
Such chips were called coprocessors in contrast to the processor itself. Initially, they were not at all mandatory; personal computers did not have to include them, but in the 486 and Pentium generations, they became a fixed part of the core and x87 instructions part of the x86 instruction set. However, the coprocessor-original character is still visible, for example, in that they use different registers.
SIMD units added laterdirectly can also be classified as coprocessors, although they are practically always integrated into the CPU core. They began to appear widely in CPUs in the second half of the 1990s. SIMD stands for “single instruction, multiple data,” and the purpose of these instructions is to always perform given operations on multiple data at once, for which they have a wider register—for example, a 128-bit register can hold four 32-bit or up to sixteen 8-bit values (which can be thought of as a vector), and one instruction can then perform, for example, addition with all values in such registers at once. SIMD instructions can therefore significantly improve performance in working with multimedia, graphics, or large amounts of numerical computations, especially when code is manually optimized to use them (vectorization; automatic use of SIMD instructions by the software compiler is called autovectorization).
In x86 processors for PCs, the first SIMD capability to appear was the MMX extension in Pentium MMX processors in 1995, which had a register width of 64 bits and used the same registers used for x87 operations in the FPU. Later, more advanced SIMD extension were gradually added: SSE through SSE4s with a register width of 128 bits (first in 1999), AVX through AVX2 with a width of 256 bits (2011), and finally the AVX-512 family of extensions with a width of 512 bits (first in 2017; in the future, the designation will transition to AVX10). Comprehensive and broad support for SIMD operations and their high performance due to the large register width (especially with AVX-512) is one of the advantages of x86 processors.
Arm processors provide the NEON extension with a width of 128 bits, and with the ARMv9 version of the instruction set, the SVE and SVE2 extensions were additionally standardized, which allow processors to have varying register widths (from 128 up to 2048 bits, in theory) while maintaining code compatibility—though this adds extra complexity to the code. RISC-V processors recently introduced the similarly conceived RVV extension.
Today, so-called matrix extensions are also beginning to appear, which are conceptually similar to SIMD, but perform instructions with an even larger number of operands at once, over entire matrices of values. These extensions in x86 processors are AMX (first featured in 4th generation Intel Xeon Scalable processors, 2022) and in the future the ACE extension will be added (which is expected to appear, for example, in AMD’s Zen 7 architecture processors in 2028). Arm processors have the SME matrix extension.
The article continues on the next page…
⠀
If anything doesn’t seem factually correct to you, please let us know—either in the comments or by email at info@hwcooling.net. I’ll forward everything to the author. The goal is to make sure that everything in the article is correct.